Distinguished Power Architect

Lead power modeling, analysis, optimization, management, convergence, and validation across CPU, AI accelerator, memory, I/O, and interconnect designs, spanning architecture through silicon - including pre-silicon analysis, post-silicon characterization, and power-management enablement.

Key responsibilities:

• Set power targets, budgets, and operating points for CPU, AI accelerator, and SoC blocks
• Build architectural, RTL, gate-level, emulation, and silicon power models
• Run RTL and gate-level power analysis and drive optimizations
• Characterize CPU, memory, I/O, and AI workloads to find power and performance bottlenecks
• Lead power/performance/area/thermal tradeoffs and power convergence
• Build automation and analysis flows in Python, TCL, Perl, or similar
• Apply techniques like clock and power gating, DVFS, and adaptive voltage scaling
• Support voltage-frequency characterization, AVS, binning, and SKU definition
• Correlate pre-silicon estimates with silicon data and build team consensus